llvm: target mips64r5900el-ps2-elf so EE code links with -flto #20

Merged
techwritescode merged 2 commits from ps2-194-n32-lto into master 2026-10-15 22:44:26 +00:00

PS2-194: lets opt: -O2 -flto link EE code with the LLVM toolchain. The EE now compiles for mips64r5900el-ps2-elf, the PS2 toolchain's own triple, which implies the R5900 and the n32 ABI.

Needs a toolchain built with ps2/llvm#18 (lld n32 bitcode) and ps2/llvm#20 (the PS2 triple). Release order matters: an LLVM toolchain without #20 rejects this triple, so this cannot ship before that toolchain release. Releases don't enforce a compatibility floor between components.

Change Why
EE --target mips64el-unknown-elf → mips64r5900el-ps2-elf lld learns n32 from the triple, and LTO code generation defaults to the R5900

-mcpu=r5900 -mabi=n32 stay on the command line; they're now redundant but harmless. The earlier gnuabin32 triple and --plugin-opt=mcpu=r5900 are gone.

Without -flto nothing changes: the bench ELF is identical to one built with the old triple, apart from the .comment string. With -flto the bench links, and the ELF header says abi2, 5900, mips3. The LLVM goldens are regenerated, and go test ./... passes.

Not yet run on the console with this triple (the rig service was down). An earlier run with the same lld fix and an equivalent n32 triple matched all 9 checksums.

Follow-up: the llvm-toolchain repo still uses mips64el-unknown-elf in the clang .cfg and in the compiler-rt, libc++ and emutls builds.

🤖 Generated with Claude Code

PS2-194: lets `opt: -O2 -flto` link EE code with the LLVM toolchain. The EE now compiles for `mips64r5900el-ps2-elf`, the PS2 toolchain's own triple, which implies the R5900 and the n32 ABI. Needs a toolchain built with ps2/llvm#18 (lld n32 bitcode) and ps2/llvm#20 (the PS2 triple). **Release order matters:** an LLVM toolchain without #20 rejects this triple, so this cannot ship before that toolchain release. Releases don't enforce a compatibility floor between components. | Change | Why | |---|---| | EE `--target` `mips64el-unknown-elf` → `mips64r5900el-ps2-elf` | lld learns n32 from the triple, and LTO code generation defaults to the R5900 | `-mcpu=r5900 -mabi=n32` stay on the command line; they're now redundant but harmless. The earlier `gnuabin32` triple and `--plugin-opt=mcpu=r5900` are gone. Without `-flto` nothing changes: the bench ELF is identical to one built with the old triple, apart from the `.comment` string. With `-flto` the bench links, and the ELF header says `abi2, 5900, mips3`. The LLVM goldens are regenerated, and `go test ./...` passes. Not yet run on the console with this triple (the rig service was down). An earlier run with the same lld fix and an equivalent n32 triple matched all 9 checksums. Follow-up: the llvm-toolchain repo still uses `mips64el-unknown-elf` in the clang `.cfg` and in the compiler-rt, libc++ and emutls builds. 🤖 Generated with [Claude Code](https://claude.com/claude-code)
llvm: build EE code that links with -flto
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21b826f6e6
EE objects now use the mips64el-unknown-none-gnuabin32 triple, so lld
sees n32 bitcode as n32, and the EE link passes the R5900 CPU to the
link-time code generator. Without -flto the output is unchanged.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
llvm: target mips64r5900el-ps2-elf
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69e9f46212
The PS2 triple implies the R5900 and n32, so lld links -flto bitcode
without a GNU environment in the triple or a CPU flag on the link.

Co-Authored-By: Claude Opus 5.5 <[email protected]>
techwritescode changed title from llvm: build EE code that links with -flto to llvm: target mips64r5900el-ps2-elf so EE code links with -flto 2026-10-15 21:52:46 +00:00
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Console rig with this branch and a dev toolchain containing ps2/llvm#18 and #20: the bench built with opt: -O2 -flto and with opt: -O2 passes, and all 9 checksums match. Runs 20261015T220417-0201 (LTO) and 20261015T220425-0202 (no LTO).

Console rig with this branch and a dev toolchain containing ps2/llvm#18 and #20: the bench built with `opt: -O2 -flto` and with `opt: -O2` passes, and all 9 checksums match. Runs 20261015T220417-0201 (LTO) and 20261015T220425-0202 (no LTO).
techwritescode deleted branch ps2-194-n32-lto 2026-10-15 22:44:26 +00:00
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