[TargetParser][Mips] Add the mips64r5900el-ps2-elf triple #20
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PS2-194: lets LLVM parse the PS2 EE toolchain's own name,
mips64r5900el-ps2-elf(GNU spelling), and makes the triple imply the R5900 and the n32 ABI. Stacked on #18, so this PR also contains #18's commit; merge #18 first.mips64r5900elparses asmips64elwith a newMipsSubArch_r5900, and prints back the same wayps2vendor (Triple::PS2), in the vendor slot as GNU spells it, soTriple("mips64r5900el-ps2-elf")works without normalising, and the clang driver picks the same toolchain as formips64el-unknown-elfisPS2()mips64elwith vendorps2, followingisPS4()/isPS5()isABIN32()isPS2(), so clang's ABI and data layout,MipsABIInfoand lld (#18) all see n32 from the tripleMipsSubArch_r5900makesr5900the default in the clang driver and inselectMipsCPU, so LTO code generation produces R5900 objects without--plugin-opt=mcpu=Precedent: the PS4/PS5 triples (
x86_64-scei-ps4,isPS4()), the MIPS r6 sub-architecture (mipsisa64r6el, which sets the default CPU) and the PSP'smipsallegrexelarch name.No GNU or Linux environment is involved, so none of the glibc assumptions that
gnuabin32would bring apply. Compared with--target=mips64el-unknown-elf -mcpu=r5900 -mabi=n32, the sdk-core bench ELF is identical apart from the.commentstring.Tests:
TripleTest: parse,isPS2,isABIN32, normalise. All 32 TripleTest tests pass, as does the rest ofTargetParserTests.clang/test/Driver/mips-ps2.c(-target-cpu r5900,-target-abi n32,_ABIN32,_MIPS_ARCH_R5900) andllvm/test/MC/Mips/r5900-ps2-triple.s(ELF32, abi2, 5900 with no-mcpu).lld/test/ELF/lto/mips-n32.ll: a PS2-triple bitcode case.unknown target triple 'unknown': the build has no default target.Still to do: the console rig run for the LTO bench built with this triple. The rig service was down; it will be reported on PS2-194.
🤖 Generated with Claude Code
Console rig: the sdk-core bench built with
--target=mips64r5900el-ps2-elf, with and without-O2 -flto(dev toolchain with #18 and #20), passes both runs, and all 9 checksums match.Runs: 20261015T220417-0201 (LTO) and 20261015T220425-0202 (no LTO).