Gate the remaining non-PS2 changes on the PS2 CPUs #14

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techwritescode merged 3 commits from ps2-gate-cleanup into r5900-ee 2026-10-15 17:12:20 +00:00

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techwritescode commented 2026-10-15 17:07:01 +00:00

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Follow-up to #13: a file-by-file review of r5900-ee against upstream (fa360c3) found four changes that reached other MIPS CPUs or other libc++ targets.

• [Mips] Accept rfe only on the R3000A: rfe was enabled for every MIPS I/II CPU. It now needs -mcpu=r3000a in both the assembler and the disassembler, and its tests move from the generic mips1 files to r3000a-rfe.s/r3000a-rfe.txt. IOP builds already pass -mcpu=r3000a.
• [Mips] Parse VU0 register names only when VU0 is present: $vfN, $viN, $ACC, $Q and $I were parsed as registers on every MIPS CPU. New test r5900-vu0-regs-invalid.s.
• libcxx/src/regex.cpp: the ctype_base mask cast is now under __ps2sdk__, so other targets compile the upstream initialisers. The four-line comment is now one line.
• MipsSubtarget.h: the enableMachineScheduler comment now names the R3000A too.

Left as is: the bc2f/bc2t errors on mips32r6/mips64r6 now say "requires a CPU feature" because the VU0 mnemonics exist. That's how the assembler reports any feature-gated mnemonic.

Testing: llvm-lit over test/MC/Mips, test/MC/Disassembler/Mips and test/CodeGen/Mips, 1674 tests, all pass. The regex change was not compiled as part of a libc++ build.

🤖 Generated with Claude Code

Follow-up to #13: a file-by-file review of `r5900-ee` against upstream (fa360c3) found four changes that reached other MIPS CPUs or other libc++ targets. - `[Mips] Accept rfe only on the R3000A`: `rfe` was enabled for every MIPS I/II CPU. It now needs `-mcpu=r3000a` in both the assembler and the disassembler, and its tests move from the generic mips1 files to `r3000a-rfe.s`/`r3000a-rfe.txt`. IOP builds already pass `-mcpu=r3000a`. - `[Mips] Parse VU0 register names only when VU0 is present`: `$vfN`, `$viN`, `$ACC`, `$Q` and `$I` were parsed as registers on every MIPS CPU. New test `r5900-vu0-regs-invalid.s`. - `libcxx/src/regex.cpp`: the `ctype_base` mask cast is now under `__ps2sdk__`, so other targets compile the upstream initialisers. The four-line comment is now one line. - `MipsSubtarget.h`: the `enableMachineScheduler` comment now names the R3000A too. Left as is: the `bc2f`/`bc2t` errors on mips32r6/mips64r6 now say "requires a CPU feature" because the VU0 mnemonics exist. That's how the assembler reports any feature-gated mnemonic. Testing: `llvm-lit` over `test/MC/Mips`, `test/MC/Disassembler/Mips` and `test/CodeGen/Mips`, 1674 tests, all pass. The regex change was not compiled as part of a libc++ build. 🤖 Generated with [Claude Code](https://claude.com/claude-code)

techwritescode added 3 commits 2026-10-15 17:07:01 +00:00

[Mips] Accept rfe only on the R3000A ... d77329e7c7

rfe was enabled for every MIPS I/II CPU. Gate it on the R3000A so other
MIPS targets keep upstream behaviour, and move its tests out of the
generic mips1 files.

Co-Authored-By: Claude Opus 5.5 <[email protected]>

[Mips] Parse VU0 register names only when VU0 is present ... 69ab0b0e64

$vfN, $viN, $ACC, $Q and $I were matched as registers on every MIPS CPU.

Co-Authored-By: Claude Opus 5.5 <[email protected]>

Scope the regex mask cast to __ps2sdk__, fix the scheduler comment ... 1674a90691

The cast in libc++ regex.cpp is needed only for newlib's ctype masks, so
other targets now see the upstream initialisers. enableMachineScheduler's
comment named only the R5900 though it also covers the R3000A.

Co-Authored-By: Claude Opus 5.5 <[email protected]>

techwritescode merged commit 1674a90691 into r5900-ee 2026-10-15 17:12:20 +00:00

techwritescode deleted branch ps2-gate-cleanup 2026-10-15 17:12:22 +00:00

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