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[Mips] Select the R5900 three-operand mult for 32-bit multiplies #11

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techwritescode merged 1 commit from r5900-mult3 into r5900-ee 2026-10-14 22:31:44 +00:00
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techwritescode commented 2026-10-14 22:21:09 +00:00
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32-bit mul on the R5900 now selects mult rd, rs, rt instead of mult + mflo, as GCC does. Adds CodeGen/Mips/r5900-mult3.ll; all 1672 Mips CodeGen and MC tests pass. Refs PS2-187 (mult1/mflo1 and the -O3 physics gap remain open).

🤖 Generated with Claude Code

32-bit `mul` on the R5900 now selects `mult rd, rs, rt` instead of `mult` + `mflo`, as GCC does. Adds CodeGen/Mips/r5900-mult3.ll; all 1672 Mips CodeGen and MC tests pass. Refs PS2-187 (mult1/mflo1 and the -O3 physics gap remain open). 🤖 Generated with [Claude Code](https://claude.com/claude-code)
[Mips] Select the R5900 three-operand mult for 32-bit multiplies
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1367a01416 
Avoids the separate mflo (PS2-187).

Co-Authored-By: Claude Sonnet 5.5 <[email protected]>
techwritescode deleted branch r5900-mult3 2026-10-14 22:31:46 +00:00
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