[Mips] Share the address of a global between repeated accesses on the R3000A (PS2-184) #9

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techwritescode merged 2 commits from r3000a-shared-global-base into r5900-ee 2026-10-13 19:20:19 +00:00

Conversation 0 Commits 2 Files changed 7 +179 -4

techwritescode commented 2026-10-13 18:55:45 +00:00

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Stacked on #8 (the diff against r5900-ee includes its commit until #8 merges).

IRX1 pairs every %hi with the %lo that follows it, so -mips-split-hi16 gives each access to a global its own lui. GCC builds the address once and reaches the members through register + offset. For code that touches a global's members many times that is two instructions per access against one.

A new shared-global-base subtarget feature, implied by r3000a only, makes the split pass share the address when a lui %hi(sym) feeds three or more plain %lo(sym+offset) users of the same global: one lui + addiu %lo(sym) (an adjacent HI16/LO16 pair that IRX1 accepts) and off($base) for every user. Two accesses cost the same either way and keep their own lui. Other CPUs are unchanged unless they request the feature. Test: CodeGen/Mips/r3000a-shared-global-base.ll.

Results (RiptOPL, all 47 IOP targets at -Oz; GCC at -Os): the 46 IRX files total 728,222 -> 684,894 bytes (-5.9%), GCC 650,850, so +11.9% -> +5.2% over GCC. At the default -Os the sdk-core audsrv IRX goes 21,271 -> 20,455 bytes. riptopl.elf 4,614,324 -> 4,579,624; packed 1,697,456 -> 1,689,488.

Tested

• Mips CodeGen and MC lit suites: 1,516 passed, 23 expected failures, 0 failed.
• sdk-core regression tests (8) and diff runs (15) in PCSX2 with the new compiler.
• RiptOPL builds completely (892 steps) and all 46 IRX pass iopfixup --irx1.
• On hardware (Deckard): iop-mmio, the sdsq/sdhd/reboot modules at -Os and -Oz, and audsrv.
• Not tested: RiptOPL itself on hardware.

🤖 Generated with Claude Code

Stacked on #8 (the diff against `r5900-ee` includes its commit until #8 merges). IRX1 pairs every `%hi` with the `%lo` that follows it, so `-mips-split-hi16` gives each access to a global its own `lui`. GCC builds the address once and reaches the members through register + offset. For code that touches a global's members many times that is two instructions per access against one. A new `shared-global-base` subtarget feature, implied by `r3000a` only, makes the split pass share the address when a `lui %hi(sym)` feeds three or more plain `%lo(sym+offset)` users of the same global: one `lui` + `addiu %lo(sym)` (an adjacent HI16/LO16 pair that IRX1 accepts) and `off($base)` for every user. Two accesses cost the same either way and keep their own `lui`. Other CPUs are unchanged unless they request the feature. Test: `CodeGen/Mips/r3000a-shared-global-base.ll`. **Results** (RiptOPL, all 47 IOP targets at `-Oz`; GCC at `-Os`): the 46 IRX files total 728,222 -> 684,894 bytes (-5.9%), GCC 650,850, so +11.9% -> +5.2% over GCC. At the default `-Os` the sdk-core audsrv IRX goes 21,271 -> 20,455 bytes. `riptopl.elf` 4,614,324 -> 4,579,624; packed 1,697,456 -> 1,689,488. **Tested** - Mips CodeGen and MC lit suites: 1,516 passed, 23 expected failures, 0 failed. - sdk-core regression tests (8) and diff runs (15) in PCSX2 with the new compiler. - RiptOPL builds completely (892 steps) and all 46 IRX pass `iopfixup --irx1`. - On hardware (Deckard): iop-mmio, the sdsq/sdhd/reboot modules at `-Os` and `-Oz`, and audsrv. - Not tested: RiptOPL itself on hardware. 🤖 Generated with [Claude Code](https://claude.com/claude-code)

techwritescode added 1 commit 2026-10-13 18:55:45 +00:00

[Mips] Share the address of a global between repeated accesses on the R3000A ... ce021f9566

IRX1 pairs every %hi with the %lo that follows it, so -mips-split-hi16 gives each
access to a global its own lui. When a function reaches one global three or
more times through plain %lo(sym+offset) operands, build the address once with
an adjacent lui and addiu pair and reach the members through register +
offset, as GCC does. Add a shared-global-base subtarget feature, implied by
r3000a.

techwritescode referenced this pull request 2026-10-13 19:13:58 +00:00

[Mips] Permit tail calls on the R3000A (PS2-184) #10

techwritescode added 1 commit 2026-10-13 19:16:46 +00:00

[Mips] Permit tail calls on the R3000A ... 267389ace7

Tail calls are off by default in the MIPS backend because of $gp handling in
position independent code. Add a tail-calls subtarget feature, implied by
r3000a, that turns them on, and drop the requirement for a local callee when
the code has no SVR4 abicalls: without $gp there is nothing to restore. A caller
that ends in a call then needs neither a frame nor callee-saved registers to
hold its arguments across it. The mips-tail-calls option still overrides the
feature.

techwritescode changed target branch from r3000a-load-delay-fill to r5900-ee 2026-10-13 19:19:27 +00:00

techwritescode merged commit 267389ace7 into r5900-ee 2026-10-13 19:20:19 +00:00

techwritescode deleted branch r3000a-shared-global-base 2026-10-13 19:20:25 +00:00

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